Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.5 (WebPack) - P.58f Target Family: Spartan6
OS Platform: LIN64 Target Device: xc6slx9
Project ID (random number) 447cd3ab89da4520b14a538824259b99.F04BE7BB4526104AA483BCD2B63930B5.11 Target Package: tqg144
Registration ID 180328474_0_0_835 Target Speed: -2
Date Generated 2013-12-18T12:01:07 Tool Flow ISE
 
User Environment
OS Name Ubuntu OS Release Ubuntu 13.10
CPU Name Intel(R) Core(TM) i7-3537U CPU @ 2.00GHz CPU Speed 1900.000 MHz
OS Name Ubuntu OS Release Ubuntu 13.10
CPU Name Intel(R) Core(TM) i7-3537U CPU @ 2.00GHz CPU Speed 2000.000 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=2
  • 9-bit adder=2
Comparators=2
  • 12-bit comparator greater=2
Counters=3
  • 20-bit up counter=2
  • 26-bit up counter=1
FSMs=1 Registers=6
  • Flip-Flops=6
MiscellaneousStatistics
  • AGG_BONDED_IO=23
  • AGG_IO=23
  • AGG_LOCED_IO=23
  • AGG_SLICE=28
  • NUM_BONDED_IOB=23
  • NUM_BSFULL=53
  • NUM_BSLUTONLY=24
  • NUM_BSUSED=77
  • NUM_BUFG=1
  • NUM_LOCED_IOB=23
  • NUM_LOGIC_O5ANDO6=8
  • NUM_LOGIC_O5ONLY=42
  • NUM_LOGIC_O6ONLY=23
  • NUM_LUT_RT_DRIVES_CARRY4=2
  • NUM_LUT_RT_EXO6=2
  • NUM_LUT_RT_O6=42
  • NUM_SLICEL=16
  • NUM_SLICEM=1
  • NUM_SLICEX=11
  • NUM_SLICE_CARRY4=16
  • NUM_SLICE_CONTROLSET=4
  • NUM_SLICE_CYINIT=131
  • NUM_SLICE_FF=53
  • NUM_SLICE_UNUSEDCTRL=13
  • NUM_SRL_O6ONLY=2
  • NUM_UNUSABLE_FF_BELS=17
NetStatistics
  • NumNets_Active=115
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEIN=10
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=3
  • NumNodesOfType_Active_CLKPIN=15
  • NumNodesOfType_Active_CLKPINFEED=3
  • NumNodesOfType_Active_CNTRLPIN=13
  • NumNodesOfType_Active_DOUBLE=56
  • NumNodesOfType_Active_GENERIC=9
  • NumNodesOfType_Active_GLOBAL=14
  • NumNodesOfType_Active_INPUT=15
  • NumNodesOfType_Active_IOBIN2OUT=5
  • NumNodesOfType_Active_IOBOUTPUT=5
  • NumNodesOfType_Active_LUTINPUT=149
  • NumNodesOfType_Active_OUTBOUND=75
  • NumNodesOfType_Active_OUTPUT=84
  • NumNodesOfType_Active_PADINPUT=2
  • NumNodesOfType_Active_PADOUTPUT=4
  • NumNodesOfType_Active_PINBOUNCE=28
  • NumNodesOfType_Active_PINFEED=180
  • NumNodesOfType_Active_QUAD=22
  • NumNodesOfType_Active_REGINPUT=4
  • NumNodesOfType_Active_SINGLE=80
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=13
  • IOB-IOBS=10
  • SLICEL-SLICEM=12
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=16
  • HARD0=2
  • HARD1=2
  • INVERTER=1
  • IOB=23
  • IOB_IMUX=10
  • IOB_INBUF=10
  • IOB_OUTBUF=13
  • LUT5=50
  • LUT6=75
  • LUT_OR_MEM6=2
  • PAD=23
  • REG_SR=53
  • SLICEL=16
  • SLICEM=1
  • SLICEX=11
 
Configuration Data
FF_SR
  • CK=[CK:1] [CK_INV:0]
  • SRINIT=[SRINIT0:1]
  • SYNC_ATTR=[SYNC:1]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:13]
  • SLEW=[SLOW:13]
  • SUSPEND=[3STATE:13]
LUT_OR_MEM6
  • CLK=[CLK:2] [CLK_INV:0]
  • LUT_OR_MEM=[RAM:2]
  • RAMMODE=[SRL16:2]
REG_SR
  • CK=[CK:53] [CK_INV:0]
  • LATCH_OR_FF=[FF:53]
  • SRINIT=[SRINIT0:53]
  • SYNC_ATTR=[ASYNC:4] [SYNC:49]
SLICEL
  • CLK=[CLK:12] [CLK_INV:0]
SLICEM
  • CLK=[CLK:1] [CLK_INV:0]
SLICEX
  • CLK=[CLK:2] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
CARRY4
  • CIN=12
  • CO0=2
  • CO3=12
  • CYINIT=4
  • DI0=16
  • DI1=13
  • DI2=13
  • DI3=12
  • O0=12
  • O1=12
  • O2=11
  • O3=11
  • S0=16
  • S1=14
  • S2=13
  • S3=13
FF_SR
  • CK=1
  • D=1
  • Q=1
  • SR=1
HARD0
  • 0=2
HARD1
  • 1=2
INVERTER
  • IN=1
  • OUT=1
IOB
  • I=10
  • O=13
  • PAD=23
IOB_IMUX
  • I=9
  • I_B=1
  • OUT=10
IOB_INBUF
  • OUT=10
  • PAD=10
IOB_OUTBUF
  • IN=13
  • OUT=13
LUT5
  • A1=2
  • A2=4
  • A3=4
  • A4=6
  • A5=6
  • O5=50
LUT6
  • A1=8
  • A2=12
  • A3=14
  • A4=65
  • A5=27
  • A6=73
  • O6=75
LUT_OR_MEM6
  • A1=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • CLK=2
  • DI2=2
  • O6=2
  • WE=2
PAD
  • PAD=23
REG_SR
  • CK=53
  • D=53
  • Q=53
  • SR=49
SELMUX2_1
  • 0=1
  • 1=1
  • OUT=1
  • S0=1
SLICEL
  • A1=2
  • A2=2
  • A3=2
  • A4=14
  • A5=4
  • A6=16
  • AMUX=2
  • AQ=12
  • AX=2
  • B4=12
  • B5=2
  • B6=13
  • BQ=12
  • BX=2
  • C3=2
  • C4=13
  • C5=2
  • C6=13
  • CIN=12
  • CLK=12
  • COUT=12
  • CQ=11
  • D2=2
  • D3=2
  • D4=13
  • D5=2
  • D6=12
  • DQ=11
  • SR=12
SLICEM
  • C1=1
  • C2=1
  • C3=1
  • C4=1
  • C5=1
  • C6=1
  • CE=1
  • CI=1
  • CLK=1
  • CQ=1
  • D1=1
  • D2=1
  • D3=1
  • D4=1
  • D5=1
  • D6=1
  • DI=1
  • DQ=1
SLICEX
  • A=9
  • A1=3
  • A2=5
  • A3=5
  • A4=7
  • A5=10
  • A6=11
  • AQ=2
  • B=5
  • B1=1
  • B2=1
  • B3=1
  • B4=4
  • B5=5
  • B6=5
  • C1=1
  • C2=1
  • C3=1
  • C4=1
  • C5=1
  • C6=2
  • CLK=2
  • CQ=2
  • D1=1
  • D2=1
  • D3=1
  • D4=1
  • D5=1
  • D6=1
  • DQ=1
  • SR=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
bitgen 54 54 0 0 0 0 0
edif2ngd 15 15 0 0 0 0 0
elfcheck 12 12 0 0 0 0 0
libgen 6 2 0 0 0 0 0
map 60 58 0 0 0 0 0
netgen 3 3 0 0 0 0 0
ngc2edif 20 20 0 0 0 0 0
ngdbuild 59 59 0 0 0 0 0
par 58 57 0 0 0 0 0
trce 56 56 0 0 0 0 0
xst 64 63 0 0 0 0 0
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_SelectedInstanceHierarchicalPath=/mojo_top/spi PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2012-11-06T11:19:28 PROP_intWbtProjectID=F04BE7BB4526104AA483BCD2B63930B5
PROP_intWbtProjectIteration=11 PROP_intWorkingDirLocWRTProjDir=UnderProjDir
PROP_intWorkingDirUsed=Yes PROP_selectedSimRootSourceNode_behav=work.spi
PROP_xilxBitgCfg_GenOpt_Compress=true PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=false PROP_DevFamily=Spartan6
PROP_ibiswriterOutputFile=pwm_top PROP_xilxBitgCfg_GenOpt_BinaryFile=true
PROP_DevDevice=xc6slx9 PROP_DevFamilyPMName=spartan6
PROP_DevPackage=tqg144 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-2 PROP_PreferredLanguage=Verilog
PROP_netgenPostMapSimModelName=pwm_top_map.v PROP_netgenPostParSimModelName=pwm_top_timesim.v
PROP_netgenPostSynthesisSimModelName=pwm_top_synthesis.v PROP_netgenPostXlateSimModelName=pwm_top_translate.v
FILE_UCF=1 FILE_VERILOG=8
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=2 NGDBUILD_NUM_FDE=2 NGDBUILD_NUM_FDR=49
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_INV=5 NGDBUILD_NUM_LUT1=44
NGDBUILD_NUM_LUT2=4 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT4=12 NGDBUILD_NUM_LUT5=6
NGDBUILD_NUM_LUT6=6 NGDBUILD_NUM_MUXCY=54 NGDBUILD_NUM_OBUF=13 NGDBUILD_NUM_OBUFT=6
NGDBUILD_NUM_SRLC16E=2 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=46
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FD=2 NGDBUILD_NUM_FDE=2 NGDBUILD_NUM_FDR=49
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=9 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=5
NGDBUILD_NUM_LUT1=44 NGDBUILD_NUM_LUT2=4 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT4=12
NGDBUILD_NUM_LUT5=6 NGDBUILD_NUM_LUT6=6 NGDBUILD_NUM_MUXCY=54 NGDBUILD_NUM_OBUF=13
NGDBUILD_NUM_OBUFT=6 NGDBUILD_NUM_SRLC16E=2 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=46
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx9-2-tqg144
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5